Voltage Type First Order All-Pass Filter Employing Fully Differential Current Feedback Operational Amplifier and Quadrature Oscillator

DergiPark: 245968trakyafbdAn improvement voltage mode first order all-pass filter configuration is proposed. The presented circuit uses a single fully differential current feedback operational amplifier (FDCFOA), resistors and a grounded capacitor. High input impedance of the proposed filter enables the circuit to be cascaded without additional buffers. It does not impose any component matching constraint in analog signal processing circuits. Also higher order all-pass filter could be achieved by cascading the proposed all-pass sections. In order to demostrate the performance of the proposed filter a new voltage mode oscillator is introduced as an application example. Furthermore the theoretical results are verified with SPICE simulations using a CMOS realization of FDCFOAGerilim modunda birinci dereceden tüm geçiren yeni bir süzgeç devresi önerilmiştir. Önerilen devrede bir tam diferansiyel akım geribeslemeli işlemsel kuvvetlendirici, dirençler ve topraklı bir kapasite bulunmaktadır. Önerilen devrenin yüksek giriş direnci, ek tampon kullanılmadan devrenin kaskad bağlanabilmesini sağlamaktadır. Analog işaret işleme devrelerinde herhangi bir eleman denkleştirme koşuluna gerek duyulmamaktadır. Aynı zamanda daha yüksek dereceden tüm geçiren süzgeçler önerilen birinci dereceden süzgeçler kaskad bağlanarak elde edilebilmektedir. Önerilen süzgecin başarımını göstermek amacıyla, bir uygulama örneği olarak gerilim modunda yeni bir osilatör tanıtılmıştır. Bundan başka teorik sonuçlar, FDCFOA elemanının CMOS gerçeklenmesi kullanılarak SPICE benzetimleriyle doğrulanmıştır

DVCC Based Current-Mode First Order All-Pass Filter and Quadrature Oscillator

DergiPark: 245946trakyafbdA current mode first-order all-pass filter configuration is proposed. The presented circuit uses a single differential voltage current conveyor (DVCC), a capacitor and resistors. High output impedance of the proposed filter enables the circuit to be cascaded without additional buffers. To demonstrate the performance of the proposed filter a new current mode quadrature oscillator is given as an application example. Oscillator is implemented through the proposed first order all-pass filter and integrator as the building blocks. Furthemore the effects of tracking errors of the DVCC on oscillation condition and frequency are investigated. The theoretical results are verified with PSPICE simulations using a new CMOS realization of DVCC

Extended Bandwidth Method on Symmetrical Operational Transconductance Amplifier and Filter Application

In this paper, a method for extending the bandwidth of a symmetrical operational transconductance amplifier (OTA) circuit is proposed. Resistive compensation technique is applied to all current mirrors of the symmetrical OTA circuit. A passive resistor is connected between the gate and the drain of each primary transistor of the current mirrors in the symmetrical OTA structure. The performance of the proposed OTA with extended transconductance bandwidth is analyzed by implementing filter structures. The advantage of using the resistive compensation technique is demonstrated. The proposed symmetrical OTA and the filters are simulated with LTSPICE by using TSMC 0.18 mu m CMOS process parameters

Retina-inspired neuromorphic edge enhancing and edge detection

In this paper, a novel analog retinomorphic block performing the edge enhancing and edge detection caused by lateral inhibition phenomenon is proposed. This phenomenon, which occurs in human retina, causes the visual acuity to improve in the edge regions of the object. In contrast to the negative meaning of the word "inhibition", this type of behavior causes the human eye to act as an analogue image processing chip. The reason for that is the edges of object are enhanced and the contrast ratios in the edge regions of an object are increased owing to the lateral inhibition. We adapt the process of convolution and the concept of image masking used in digital image signal processing method to analog image signal processing method. Our proposed circuit, which exhibits edge enhancing behavior thanks to lateral inhibition, consists of only current mirrors and current subtractor circuits. We obtain the analysis results via a simple circuit design having lateral inhibition feature and the results are quite similar to that occurring in human retina. In addition to the ability of lateral inhibition, we utilize from the masking property of the lateral inhibition circuit and change the coefficients of the mask in order to obtain an edge detecting circuit. For this purpose, we use a mask whose sum of the coefficients is equal to zero. Two different 500 x 500 pixel silicon networks are designed for both edge enhancement and edge detection circuits. We have analyzed an image with the helped of both edge enhancement and edge detection circuits. Analyses results reveal that our suggested block, which is set up using only MOS transistors, can enable edge enhancement and edge detection in grayscale image and lateral inhibition behavior of the human retina can be provided using a simple electronic circuit design which has the ability of performing convolution operation. TSMC CMOS 0.18 mu m process model is utilized to simulate proposed two analog circuit networks. (C) 2019 Elsevier GmbH. All rights reserved

Extended Bandwidth Method on Symmetrical Operational Transconductance Amplifier and Filter Application

In this paper, a method for extending the bandwidth of a symmetrical operational transconductance amplifier (OTA) circuit is proposed. Resistive compensation technique is applied to all current mirrors of the symmetrical OTA circuit. A passive resistor is connected between the gate and the drain of each primary transistor of the current mirrors in the symmetrical OTA structure. The performance of the proposed OTA with extended transconductance bandwidth is analyzed by implementing filter structures. The advantage of using the resistive compensation technique is demonstrated. The proposed symmetrical OTA and the filters are simulated with LTSPICE by using TSMC 0.18 mu m CMOS process parameters

DTMOS based low-voltage low-power all-pass filter

In this paper, a voltage mode all-pass filter design employing floating current sources (FCS) is proposed. The presented all-pass filter circuit contains two floating current sources, one grounded resistor and one floating capacitor. Furthermore, the PMOS transistors of the FCSs are replaced with dynamic threshold-voltage MOSFET (DTMOS) transistors. Due to the use of DTMOS transistors, power consumption and supply voltages of the filter circuit are reduced considerably, compared to the classical circuit. The gain and phase responses, input and output waves, the total harmonic distortion (THD) results, temperature performance, output noise voltage and Monte Carlo (MC) analyses of the all-pass filter are simulated. The simulation results of the proposed DTMOS based circuit are performed with the LTSPICE program using 0.18 ?m TSMC CMOS process parameters. © 2021, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature

Design of voltage-mode PID controller using a single voltage differencing current conveyor (VDCC)

This paper presents a voltage differencing current conveyor (VDCC) based voltage-mode (VM) proportional integral derivative (PID) controller for the first time. The proposed VM PID controller consists of a single VDCC, four resistors, and two grounded capacitors. The proposed circuit employs a minimum number of passive components and does not require any passive element matching condition. The proposed circuit can realize both non-inverting and inverting VM PID controller transfer functions simultaneously. The control parameters can be adjusted electronically. The sensitivity of the control parameters has been examined for ideal and non-ideal conditions. Besides, the effects of parasitic impedances on the operating frequency limits have been investigated in non-ideal conditions. Simulation results have been performed with the LTspice program using TSMC 0.18 mu m CMOS technology parameters. The total power dissipation of the proposed PID controller is 1.06 mW. Monte Carlo and temperature analyses have been carried out to validate the robustness of the proposed circuit. A closed-loop control system application is given to demonstrate the functionality of the proposed controller. Additionally, a comparison of the proposed VM PID controller with the relevant circuits previously published in the literature is presented

Electronically Tunable Memcapacitor Emulator Based on Operational Transconductance Amplifiers

Memory circuit elements are of interest due to their use in different fields of science and technology. In this research, a new multi-outputs operational transconductance amplifiers (MO-OTA)-based memcapacitor emulator is proposed. The proposed emulator employs two OTAs, two capacitors, two resistors and an analog multiplier. The memcapacitor emulator circuit has electronically tunability property. Charge value of the memcapacitor can be adjusted by changing the transconductance g(m) value with the biasing current of the MO-OTA or frequency value of the input signal. In order to analyze the performance of the proposed circuit, memcapacitor emulator is simulated in 0.18 mu m TSMC CMOS process using LTSPICE and the simulation results are demonstrated

Grounded inductance simulator realization with single VDDDA

In this paper, a grounded inductance simulator circuit employing single voltage differencing differential difference amplifier (VDDDA) and a grounded capacitor is proposed. The purpose of this paper is to present an inductance simulator using minimum number of active and passive components. Due to the use of grounded capacitor in the proposed inductance simulator, the circuit is suitable for analog integrated circuit implementations. The circuit does not require any conditions of component matching. Furthermore, the presented circuit has electronically tunability property through changing the biasing current of the VDDDA. Inductance value of the circuit is analyzed for different biasing current values and at various temperatures. Additionally, in order to analyze the performance of the inductance simulator circuit, it is used in a second-order multifunction filter and third-order high pass filter structures. Noise voltage, frequency response, time domain response and total harmonic distortion analyzes are simulated for the filters. The simulation results of the proposed inductance simulator and filter circuits are verified and demonstrated with LTSPICE by using 0.18 µm TSMC CMOS process parameters. © 2021, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature